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the information contained in this document is being issued in advance of the production cycle for the product. the parameters for the product may change before final production or nec electronics corporation, at its own discretion, may withdraw the product prior to its production. not all products and/or types are availabe in every country. please check with an nec electronics sales representative for availability and additional information. 2003 mos integrated circuit pd160970 8-ch level shift driver ic preliminary product information document no. s15857ej4v0pm00 (4th edition) date published january 2003 ns cp (k) printed in japan the mark shows major revised points. description the pd160970 is a level shift driver ic for ltps (low-temperature polysilicon) tft-lcds featuring a 2-level output function and incorporates eight on-chip level shifters. this ic realizes a 20 v max. withstanding voltage due to a high-withstanding-voltage cmos process and has an output on-resistance and switching characteristics ideal for tft driving in lcd panels. features ? high withstanding voltage : 20 v (max.) ? supports low-voltage input (logic power supply voltage : 3.0 to 3.6 v) ? includes 8 level shifters (among which 2 circuits can switch between normal and inverted output) ? small thin package : 24-pin plastic tssop (5.72 mm (225) ) ordering information part number package pd160970ma-6a5 24-pin plastic tssop (5.72 mm (225) ) .
preliminary product information s15857ej4v0pm 2 pd160970 1. block diagram / pin configuration ? 24-pin plastic tssop (5.72 mm (225) ) pd160970ma-6a5 v o1 1 2 3 4 6 7 8 9 10 11 12 2 values 2 values 2 values 2 values 2 values 2 values 2 values 2 values l/s l/s l/s 24 23 22 21 20 19 5 l/s 18 l/s l/s l/s 17 16 15 14 13 v i2 v i3 v i4a v i4b v dd v ss v i5b v i5a v i6 v i7 v i8 v ee v cc v o2 v ee v cc v o3 v o4 v o5 v o6 v o7 v o8 v i1 l/s l/s : level shifter (v dd v cc , v ss v ee )
preliminary product information s15857ej4v0pm 3 pd160970 2. pin functions pin name pin symbol i/o function pin name pin symbol i/o function v i1 1v o8 13 v i2 2v o7 14 output high-withstanding-voltage output v i3 3v ee 15 ? negative power supply for high -withstanding-voltage block v i4a 4v cc 16 ? positive power supply for high -withstanding voltage block v i4b note 5 input logic input v o6 17 v dd 6 ? power supply for logic block v o5 18 v ss 7 ? logic ground v o4 19 v i5b note 8v o3 20 output high-withstanding-voltage output v i5a 9v cc 21 ? negative power supply for high -withstanding-voltage block v i6 10 v ee 22 ? positive power supply for high -withstand-voltage block v i7 11 v o2 23 v i8 12 input logic input v o1 24 output high-withstanding-voltage output note use the v i4b and v i5b pins at the dc level. 3. relation of logic input and high-withstanding-voltage output 3.1 v i1 to v i3 , v i6 to v i8 v in v on lv cc hv ee v cc v dd v ss v ee high-withstanding-voltage output logic input 3.2 v i4a /v i4b , v i5a /v i5b v ina v inb v on lv cc h l (dc) v ee lv ee h h (dc) v cc
preliminary product information s15857ej4v0pm 4 pd160970 4. usage cautions (1) the power-on sequence is v ss v dd logic signal v ee v cc , and the power-off sequence is the reverse sequence. ? v ss and v dd , and v ee and v cc can be powered on simultaneously. ? to prevent an abnormal output operation, it is recommended to fix the logic input during the transition phase of v ee and v cc to either ?h? or ?l?. v cc v ee v dd v ss logic signal remark the term ?logic signal? as used above includes not only the rising edge/falling edge of the signal, but also ?h? or ?l? level input. (2) to ensure the switching characteristics of the v i4a /v i4b and v i5a /v i5b signal input, be sure to make the v i4b and v i5b pins dc input. also, be sure to fix unused input pins to ?h? or ?l?. (3) perform thorough evaluation with the actual device for simultaneous switching of multiple output circuits, bearing in mind the allowable output current during switching. (4) the output transistors in this device are designed for an impedance of several tens of ohms. therefore, if driving a large load, ic malfunction and ic destruction or degradation may result owing to the influence of an output current of several hundred ma p-p per output. to prevent such malfunction from occurring, a number of countermeasures can be implemented, including the following. <1> use a large-capacitance decoupling capacitor with superior high-frequency characteristics. <2> insert in series a damping resistor for limiting the output current between the output pin and the load. since the optimum values of constants differ depending on the equipment, determine the correct constants based on careful evaluation. (5) be sure to externally short power-supply pins for which several exist (v cc and v ee ). (6) do not use the device with multiple output pons shorted. this may cause ic malfunction, destruction, or degradation.
preliminary product information s15857ej4v0pm 5 pd160970 5. electrical specifications absolute maximum ratings (t a = 25 c, v ss = 0 v) parameter symbol rating unit logic part supply voltage v dd ? 0.5 to +4.5 v positive power supply for high -withstanding-voltage block v cc ? 0.5 to +17.0 v negative power supply for high -withstanding-voltage block v ee ? 8.0 to +0.5 v bias power supply for high -withstanding-voltage block v cc -v ee ? 0.5 to +25.0 v input voltage v i ? 0.5 to v dd + 0.5 v output voltage v o v ee ? 0.5 to v cc + 0.5 v operating ambient temperature t a ? 10 to +60 c storage temperature t stg ? 40 to +125 c power dissipation p d 500 note mw note when a glass epoxy board (100 mm x 100 mm x 1.0 mm, copper-plated area of 15%) is mounted. caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. recommended operating range (t a = ? ? ? ? 10 to +60c, v ss = 0 v) parameter symbol conditions min. typ. max. unit v dd 3.0 3.3 3.6 v v cc 9.5 11.5 13.5 v v ee ? 6.5 ? 5.5 ? 4.5 v supply voltage v cc -v ee 14.0 17.0 20.0 v clock frequency f clk 200 khz electrical characteristics (t a = ? ? ? ? 10 to +60 c, v dd = 3.3 v 0.3 v, v ss = 0 v, v cc = 11.5 v 1.0 v, v ee = ? ? ? ? 5.5 v 0.5 v, t r = t f 5.0 ns) parameter symbol conditions min. typ. note max. unit low-level input voltage v il all input pins v ss 0.2 v dd v high-level input voltage v ih all input pins 0.7 v dd v dd v low-level output voltage v ol i ol = +1.0 ma, all output pins ? 5.42 ? 4.87 v high-level output voltage v oh i oh = ? 1.0 ma, all output pins 10.37 11.42 v output on resistance r on i o = 1.0 ma, all output pins 80 130 ? i dd v dd 0.1 10 a static current i cc v i = v ss no load v cc 0.1 10 a input leak current i il v i = v dd or v ss , all input pins ? 1.0 1.0 a input capacitance c i 7pf note the typ. value is a reference value when t a = 25 c, v dd = 3.3 v, v cc = 11.5 v, v ee = ? 5.5 v.
preliminary product information s15857ej4v0pm 6 pd160970 switching characteristics (t a = ? ? ? ? 10 to +60 c, v dd = 3.3 v 0.3 v, v ss = 0 v, v cc = 11.5 v 1.0 v, v ee = ? ? ? ? 5.5 v 0.5 v, t r = t f 5.0 ns) parameter symbol condition min. typ. note max. unit t phl1 35 140 ns output delay time1 t plh1 all output pins, no load, v o1 -v o3 , v o6 -v o8 45 140 ns t phl2 40 140 ns output delay time2 t plh2 all output pins, no load, v o4 , v o5 50 140 ns note the typ. value is a reference value when t a = 25 c, v dd = 3.3 v, v cc = 11.5 v, v ee = ? 5.5 v.
preliminary product information s15857ej4v0pm 7 pd160970 switching characteristics waveform 50% logic input high-withstanding-voltage output high-withstanding-voltage output 90% 10% t f t r 50% v ee t phl2 t plh2 v cc v ee v cc v ss v dd 10% 90% 50% t plh1 , t plh2 t phl1 , t phl2 50% 50% 50%
preliminary product information s15857ej4v0pm 8 pd160970 6. package drawing s 24-pin plastic tssop (5.72 mm (225)) note each lead centerline is located within 0.10 mm of its true position (t.p.) at maximum material condition. item millimeters a a' c d 6.65 0.10 6.5 0.1 0.1 0.05 f 0.5 (t.p.) g b 0.575 e 0.22 0.05 1.2 max. h 1.0 0.05 i 6.4 0.1 j 4.4 0.1 k 0.17 0.025 l 0.5 m 0.10 n 0.08 r 0.25 1.0 0.1 s 0.6 0.15 p24ma-50-6a5 p3 + 5 ? 3 24 13 1 12 m s n k f g l r s e p j dm c a b a' h i detail of lead end
preliminary product information s15857ej4v0pm 9 pd160970 7. recommended mounting conditions the pd160970 should be soldered and mounted under the following recommended conditions. for details of the recommended soldering conditions, refer to the document semiconductor device mounting technology manual (c10535e). for soldering methods and conditions other than those recommended below, contact an nec electronics sales representative. recommended soldering conditions for surface mounting type pd160970ma-6a5 : 24-pin plastic tssop (5.72 mm (225) ) soldering method soldering conditions recommended condition symbol infrared reflow package peak temperature : 235 c, time : 30 seconds max. (at 210 c or higher), count : three times or less, exposure, limit : none, flux : rosin flux with low chlorine (0.2 wt% or below) recommended ir35-00-3 vps package peak temperature : 215 c, time : 40 seconds max. (at 200 c or higher), count : three times or less, exposure, limit : none, flux : rosin flux with low chlorine (0.2 wt% or below) recommended vp15-00-3 wave soldering package peak temperature : 260 c, time : 10 seconds max., preheating temperature : 120 c max., exposure, limit : once, flux : rosin flux with low chlorine (0.2 wt% or below) recommended ws60-00-1 caution do not use different soldering methods together.
preliminary product information s15857ej4v0pm 10 pd160970 [memo]
preliminary product information s15857ej4v0pm 11 pd160970 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
pd160970 reference documents nec semiconductor device reliability/quality control system (c10983e) quality grades on nec semiconductor devices (c11531e) the information contained in this document is being issued in advance of the production cycle for the product. the parameters for the product may change before final production or nec electronics corporation, at its own discretion, may withdraw the product prior to its production. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of an nec electronics products depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. ? ? ? ? ? ? ? m5d 02. 11-1 the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) (1) (2) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. "standard": "special": "specific":

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